1. Field of the Invention
The invention generally relates to emitter follower circuits utilizing complementary bipolar transistors and, more particularly, to such circuits characterized by low power consumption and high speed in responding to input signal transitions of either increasing or decreasing sense.
2. Description of the Prior Art
As is well known, a capacitively loaded emitter follower circuit using complementary transistors such as shown, for example, in FIG. 8-36 on page 304 of the text Pulse, Digital and Switching Waveforms, by J. Millman and H. Taub, McGraw Hill, 1965, provides an output waveform having rising edges and falling edges that follow (with comparable speed) the corresponding rising and falling edges of the input waveform. In the example given, however, the bases of the series-connected complementary transistors are driven by the same input waveform whose voltage excursions turn each transistor on and off.
This necessitates a relatively large input voltage excursion, at least equal to the sum of the V.sub.be 's for forward biasing the emitter-base junctions of the two transistors, and represents a significant power expenditure.
It is desirable that a way be found to actuate the complementary emitter follower circuit using voltage excursions which are only a fraction of the sum of the two V.sub.be voltages so that power dissipation, especially within large scale integrated circuits, may be minimized. It is also desirable that such actuation be achieved without compromising the response speed of the circuit.